/**
 *	Defines the Reset and Clock Control Register definitions for STM32
 *
 *
 *
 **/
#ifndef _RCC_H_
#define _RCC_H_

#include <bitthunder.h>

typedef struct _LPC17xx_RCC_REGS {
	BT_u32 FLASHCFG;

#define	LPC17xx_RCC_FLASHCFG_MASK				0x0000F000

	BT_STRUCT_RESERVED_u32(0, 0x0000, 0x0080);
	BT_u32 PLL0CON;

#define LPC17xx_RCC_MAINPLL_ENABLE		0x00000001
#define LPC17xx_RCC_MAINPLL_CONNECT		0x00000002

	BT_u32 PLL0CFG;

#define LPC11xx_RCC_MAINPLLCTRL_MSEL(x)			((x & 0x00007FFF)+1)
#define LPC11xx_RCC_MAINPLLCTRL_NSEL(x)			(((x & 0x00FF0000) >> 16) + 1)

	BT_u32 PLL0STAT;

#define LPC17xx_RCC_MAINPLLSTAT_ENABLE			0x01000000
#define LPC17xx_RCC_MAINPLLSTAT_CONNECT			0x02000000
#define LPC17xx_RCC_MAINPLLSTAT_LOCKED			0x04000000

	BT_u32 PLL0FEED;

#define LPC17xx_RCC_MAINPLLFEED_A			0xAA
#define LPC17xx_RCC_MAINPLLFEED_B			0x55

	BT_STRUCT_RESERVED_u32(1, 0x008C, 0x00A0);
	BT_u32 PLL1CON;

#define LPC17xx_RCC_USBPLL_ENABLE		0x00000001
#define LPC17xx_RCC_USBPLL_CONNECT		0x00000002

	BT_u32 PLL1CFG;
	BT_u32 PLL1STAT;

#define LPC17xx_RCC_USBPLLSTAT_LOCKED			0x00000400

	BT_u32 PLL1FEED;

#define LPC17xx_RCC_USBPLLFEED_A			0xAA
#define LPC17xx_RCC_USBPLLFEED_B			0x55

	BT_STRUCT_RESERVED_u32(2, 0x00AC, 0x00C0);
	BT_u32 PCON;
	BT_u32 PCONP;


#define	LPC17xx_RCC_PCONP_TIMER0EN			0x00000002
#define	LPC17xx_RCC_PCONP_TIMER1EN			0x00000004
#define	LPC17xx_RCC_PCONP_UART0EN			0x00000008
#define	LPC17xx_RCC_PCONP_UART1EN			0x00000010
#define	LPC17xx_RCC_PCONP_PWM0EN			0x00000040
#define	LPC17xx_RCC_PCONP_I2C0EN			0x00000080
#define	LPC17xx_RCC_PCONP_SPIEN				0x00000100
#define	LPC17xx_RCC_PCONP_SSP1EN			0x00000400
#define	LPC17xx_RCC_PCONP_ADC0EN			0x00001000
#define	LPC17xx_RCC_PCONP_CAN1EN			0x00002000
#define	LPC17xx_RCC_PCONP_CAN2EN			0x00004000
#define	LPC17xx_RCC_PCONP_MCPWM0EN			0x00020000
#define	LPC17xx_RCC_PCONP_QEI0EN			0x00040000
#define	LPC17xx_RCC_PCONP_I2C1EN			0x00080000
#define	LPC17xx_RCC_PCONP_SSP0EN			0x00200000
#define	LPC17xx_RCC_PCONP_TIMER2EN			0x00400000
#define	LPC17xx_RCC_PCONP_TIMER3EN			0x00800000
#define	LPC17xx_RCC_PCONP_UART2EN			0x01000000
#define	LPC17xx_RCC_PCONP_UART3EN			0x02000000
#define	LPC17xx_RCC_PCONP_I2C2EN			0x04000000

	BT_STRUCT_RESERVED_u32(3, 0x00C4, 0x0104);
	BT_u32 CCLKCFG;
	BT_u32 USBCLKCFG;
	BT_u32 CLKSRCSEL;

#define LPC17xx_RCC_CLKSRCSEL_RESERVED		0x00000003
#define LPC17xx_RCC_CLKSRCSEL_RTC_OSC		0x00000002
#define LPC17xx_RCC_CLKSRCSEL_MAIN_OSC		0x00000001
#define LPC17xx_RCC_CLKSRCSEL_IRC_OSC		0x00000000
#define LPC17xx_RCC_CLKSRCSEL_NOT_USED		0xFFFFFFFF

	BT_STRUCT_RESERVED_u32(4, 0x010C, 0x01A0);
	BT_u32 SCS;

#define	LPC17xx_RCC_SCS_OSCEN				0x00000020
#define	LPC17xx_RCC_SCS_OSCSTAT				0x00000040

	BT_STRUCT_RESERVED_u32(5, 0x01A0, 0x01A8);
	BT_u32 PCLKSEL0;
	BT_u32 PCLKSEL1;
	BT_STRUCT_RESERVED_u32(6, 0x01AC, 0x01C8);
	BT_u32 CLKOUTCFG;


} LPC17xx_RCC_REGS;

#define LPC17xx_RCC_BASE	0x400FC000
#define LPC17xx_RCC 		((LPC17xx_RCC_REGS *) (LPC17xx_RCC_BASE))

BT_u32 BT_LPC17xx_GetPeripheralClock(BT_u32 ulPeripheral);
BT_u32 BT_LPC17xx_SetPeripheralClockDivider(BT_u32 ulPeripheral, BT_u32 ulDivider);
BT_u32 BT_LPC17xx_GetMainFrequency(void);
BT_u32 BT_LPC17xx_GetSystemFrequency(void);
void BT_LPC17xx_SetSystemFrequency(BT_u32 SysClkCtrl,
								   BT_u32 MainPLLClkSrc,
								   BT_u32 MainPLLClkCtrl,
								   BT_u32 SystemClockDivider,
								   BT_u32 USBClkSrc,
								   BT_u32 USBPLLClkCtrl,
								   BT_u32 USBClkDivider);


#endif
